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Researchers from QuEra Computing, Harvard University and Anthropic used Claude with an automated correctness evaluator to search for more resource-efficient quantum circuits. Their preprint reports lower gate counts and qubit requirements in seven of eight building blocks, including a 12-fold reduction in Toffoli gates for a Reed-Solomon decoder; these are design estimates, not demonstrations on quantum hardware.
Researchers from QuEra Computing, Harvard University and Anthropic report that they used Anthropic’s Claude model, paired with an automated circuit evaluator, to find quantum circuit designs with lower estimated resource requirements. In a preprint covering eight computational building blocks, the team says seven designs reduced both gate counts and qubit requirements, a result that could make some future fault-tolerant quantum applications less demanding to run.
The study, titled Discovering State-of-the-Art Quantum Circuits with Large Language Models, describes a search process in which Claude proposed circuit designs and an independent automated evaluator checked their correctness and measured their resource use. The evaluation tracked Toffoli-gate count and logical-qubit count. Researchers used the evaluator’s feedback to guide further design attempts.
Among the reported examples, the Reed-Solomon decoder’s Toffoli count fell from about 5.1 million to 440,000, a roughly 12-fold reduction, while the design also used fewer qubits. For a Coulomb-potential calculation, the paper reports a 9.9-fold reduction in a combined resource metric: Toffoli gates declined from 6,355 to 1,140, and qubits from 252 to 142.
A fixed-point Gaussian function had the largest reported change in that combined metric: a 39-fold reduction, with Toffoli gates falling from about 24,000 to 1,583 and qubits from 362 to 139. The metric multiplies gate count by peak logical-qubit count. It does not measure execution speed, and the reported figures describe individual circuit components rather than completed applications run on quantum hardware.
Lower Costs for Quantum Building Blocks
Quantum computers capable of useful fault-tolerant calculations will need to manage both the number of operations and the number of logical qubits. The study targets those algorithm-side demands: reducing them could allow a machine with a given capacity to handle more complex computations, or bring some workloads within reach sooner. Whether that potential carries through to a complete application depends on how often each component is used and what additional operations the full algorithm requires.
The results also illustrate a possible use for AI that differs from controlling quantum hardware: searching for circuit structures that satisfy the strict reversibility requirements of quantum computation. The approach is not evidence that a general-purpose quantum computer can now solve a new practical problem. It is a reported method for producing candidate designs, which still need to be assessed in the context of full workloads and real hardware constraints.
Resource reductions are not interchangeable with speedups. Toffoli gates can contribute substantially to the overhead of fault-tolerant computation, while logical qubits consume limited computational capacity. Actual runtime and physical-qubit needs vary with hardware architecture and implementation, so the paper’s circuit-level estimates do not alone establish how quickly or cheaply a real machine could perform the calculations.
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How the AI Search Worked
The work appears as the preprint arXiv:2610.22367; the supplied report identifies Andi Gu as its lead researcher through Anthropic’s STEM Fellows Program. The collaboration includes Anthropic researchers and Harvard researchers, including Mikhail Lukin, who is also a QuEra co-founder and chief science officer. The eight targets are computational building blocks intended for use in larger algorithms, rather than eight complete quantum applications.
In addition to improving existing designs, the team reports a new reversible method for modular inversion, an operation used in elliptic-curve calculations. For a complete point-addition benchmark, one design used about 17 times fewer gates than a previous design with the fewest qubits, but required about 12% more qubits. This is a trade-off, not a simultaneous reduction in both measures for that comparison.
The project follows an earlier QuEra-Anthropic pilot involving laser control. According to the source material, Claude developed and validated software that recovered the correct laser lock in 695 of 700 trials; the resulting controller runs as conventional software without AI. That pilot concerned control software, while the new preprint focuses on circuit design.
“What is exciting here is that AI, guided by a rigorous evaluator, found new circuit structures that work more efficiently within that constraint.”
— Mikhail Lukin, QuEra co-founder and chief science officer, and Harvard professor
Circuit Estimates, Not Hardware Runs
The supplied materials describe a preprint, not a peer-reviewed publication, and do not report the circuits being executed on quantum hardware. It is not clear from the available information how the reported reductions would translate into runtime, physical-qubit requirements, error-correction overhead or total resources for complete applications.
The paper examines eight building blocks and reports improvement in seven; the eighth produced a new approach with additional gate-versus-qubit trade-offs rather than reductions in both measures. The results also depend on the stated baselines and chosen metrics. The 39-fold figure is specifically for the product of Toffoli count and peak logical qubits, not a speedup. Independent validation and further details on full-application performance are not established in the supplied report.
Testing Designs in Larger Workloads
The next test is whether these circuits can be incorporated into complete quantum algorithms and retain their resource advantages when the full computation is counted. Further work would also need to examine implementation on specific fault-tolerant architectures, including the costs of error correction and the relationship between logical and physical qubits. The source material says the collaborators plan to continue working together, but gives no timetable for hardware demonstrations or later publication.
Key Questions
What did the researchers use AI to do?
They used Claude to propose quantum circuit designs. An automated evaluator checked candidate designs for correctness and scored their Toffoli-gate and logical-qubit requirements, with feedback guiding the search.
Were the circuits tested on a quantum computer?
The supplied report describes resource estimates for circuit building blocks, not executions on quantum hardware. It does not establish how the estimates translate into performance on a particular machine.
Does the reported 39-fold reduction mean a 39-fold speedup?
No. It refers to a combined metric calculated by multiplying Toffoli-gate count by peak logical-qubit count for a fixed-point Gaussian function. It is not a measurement of runtime or speedup.
What happened in the modular-inversion result?
The researchers describe a new reversible approach that offers different trade-offs between gates and qubits. In a point-addition benchmark, one design used about 17 times fewer gates than a prior design using the fewest qubits, while using about 12% more qubits.
Source: thequantuminsider.com
